diff --git a/participants/ahmad.omar/final-project.html b/participants/ahmad.omar/final-project.html
index 39338ced39be2fde9ebc6f9c0a4862d71f835c1c..de3aa7cec3aae1102bfabaded345c69764b7b5dc 100644
--- a/participants/ahmad.omar/final-project.html
+++ b/participants/ahmad.omar/final-project.html
@@ -27,59 +27,139 @@
 <h3 id="pcb-design">PCB Design</h3>
 <p>I have started designing my circuit board using the kokopelli software. After I had finished designing the circuit board, Mr. Fransisco recommended me to reduce the size of the circuit board because there were many empty parts within the designed circuit board, and he told me that the small circuit boards are more attractive for people.</p>
 <p>In order to design the circuit board I have copied the code text where all the components are defined from this <a href="https://pub.pages.cba.mit.edu/libraries/kokompe/pcb.cad">link</a>. Then I started writing my own code text for designing in <strong>define board</strong> section. The text for my circuit design was as follow:</p>
-<p>``` # define board #</p>
-<p>w = .016 width = 1.29 height = 0.93 mask = .004 x = 1 y = 1 z = -.005 d = .06</p>
-<p>pcb = PCB(x,y,width,height,mask)</p>
-<p>IC1 = ATtiny44_SOICN('IC144') pcb = IC1.add(pcb,x+.23+0.4,y+.59,z)</p>
-<p>J1 = header_ISP('J1') pcb = J1.add(pcb,IC1.x+.05,IC1.pad[7].y-.22,z,angle=90)</p>
-<p>pcb = wire(pcb,w, IC1.pad[8], J1.pad[1])</p>
-<p>pcb = wire(pcb,w, IC1.pad[9], J1.pad[3])</p>
-<p>pcb = wire(pcb,w, IC1.pad[7], point(IC1.pad[7].x+.01,J1.y-.02,z), J1.pad[4])</p>
-<p>pcb = wire(pcb,w, IC1.pad[4], J1.pad[5])</p>
-<p>pcb = wire(pcb,w, IC1.pad[14], point(J1.x-.05,J1.y+.02,z), point(J1.x+.05,J1.pad[2].y-.08,z), J1.pad[6])</p>
-<p>J2 = header_FTDI('J2 FTDI') pcb = J2.add(pcb,x+width-.22,IC1.y-.0,z,angle=0)</p>
-<p>pcb = wire(pcb,w, J1.pad[2], point(J2.x+.08,J2.pad[3].y,z), J2.pad[3])</p>
-<p>pcb = wire(pcb,w, IC1.pad[13], point(IC1.pad[13].x+.24,J2.pad[4].y,z), J2.pad[4])</p>
-<p>pcb = wire(pcb,w, IC1.pad[12], point(IC1.pad[12].x+.2,J2.pad[5].y,z), J2.pad[5])</p>
-<p>R1 = R_1206('R110k'); pcb = R1.add(pcb,IC1.pad[1].x,IC1.pad[1].y+.1,z)</p>
-<p>pcb = wire(pcb,w, R1.pad[1], IC1.pad[1])</p>
-<p>pcb = wire(pcb,w, J2.pad[3], point(J2.pad[3].x+.08,R1.y+.06,z), R1.pad[1])</p>
-<p>pcb = wire(pcb,w, R1.pad[2], J1.pad[5])</p>
-<p>C1 = C_1206('C11uF'); pcb = C1.add(pcb,IC1.pad[14].x,R1.y,z)</p>
-<p>pcb = wire(pcb,w, IC1.pad[14], C1.pad[2])</p>
-<p>pcb = wire(pcb,w, C1.pad[1], point(C1.pad[1].x,C1.y+.06,z))</p>
-<p>pcb = wire(pcb,w, J2.pad[1], C1.pad[2])</p>
-<p>REG = regulator_SOT223('REG'); pcb = REG.add(pcb,IC1.x-0.28,1.46,z)</p>
-<p>C2 = C_1206('C210uF'); pcb = C2.add(pcb,REG.x-0.09,REG.y-0.28,z,90)</p>
-<p>C3 = C_1206('C310uF'); pcb = C3.add(pcb,REG.x+0.09,REG.y-0.28,z,90)</p>
-<p>solar = D_1206('D'); pcb = solar.add(pcb,REG.x-0.25,REG.y-0.22,z)</p>
-<p>solar2 = C_1206('+'); pcb = solar2.add(pcb,REG.x-0.25,REG.y-0.1,z)</p>
-<p>pcb = wire(pcb,0.068, solar2.pad[1], solar2.pad[2])</p>
-<p>pcb = wire(pcb,w, solar2.pad[1], solar.pad[1])</p>
-<p>solar1 = C_1206('-'); pcb = solar1.add(pcb,REG.x-0.25,REG.y-0.345,z)</p>
-<p>pcb = wire(pcb,0.068, solar1.pad[1], solar1.pad[2])</p>
-<p>pcb = wire(pcb,w, solar1.pad[1], C2.pad[1])</p>
-<p>pcb = wire(pcb,w, solar.pad[2], C2.pad[2])</p>
-<p>pcb = wire(pcb,w, C2.pad[2], REG.pad[1])</p>
-<p>pcb = wire(pcb,w, J1.pad[6], C3.pad[1])</p>
-<p>pcb = wire(pcb,w, J1.pad[6], C2.pad[1])</p>
-<p>pcb = wire(pcb,w, J1.pad[6], REG.pad[2])</p>
-<p>pcb = wire(pcb,w, REG.pad[3], C3.pad[2])</p>
-<p>S = C_1206('I/N-S'); pcb = S.add(pcb,REG.x+0.,REG.y+0.29,z,90)</p>
-<p>pcb = wire(pcb,0.068, S.pad[1], S.pad[2])</p>
-<p>pcb = wire(pcb,w, IC1.pad[2], S.pad[1])</p>
-<p>G = C_1206('GND'); pcb = G.add(pcb,REG.x-.15,REG.y+0.29,z,90)</p>
-<p>pcb = wire(pcb,0.068, G.pad[1], G.pad[2])</p>
-<p>pcb = wire(pcb,w, REG.pad[4], G.pad[1])</p>
-<p>Vcc = C_1206('Vcc'); pcb = Vcc.add(pcb,REG.x-0.3,REG.y+0.29,z,90)</p>
-<p>pcb = wire(pcb,0.068, Vcc.pad[1], Vcc.pad[2])</p>
-<p>pcb = wire(pcb,w, Vcc.pad[1],point(Vcc.pad[2].x+.0,REG.y,z), REG.pad[3])</p>
-<p>R2 = R_1206('R2'); pcb = R2.add(pcb,IC1.x+0.24,IC1.y-0.119,z,90)</p>
-<p>pcb = wire (pcb,w, IC1.pad[10], R2.pad[2])</p>
-<p>pcb = wire(pcb,w, R1.pad[1],point(R1.pad[1].x,Vcc.y+0.15,z), Vcc.pad[2])</p>
-<p>O = R_1206('O'); pcb = O.add(pcb,IC1.x+0.24,IC1.y-0.33,z,90)</p>
-<p>pcb = wire(pcb,0.068, O.pad[1], O.pad[2])</p>
-<p>pcb = wire(pcb,w, R2.pad[1], O.pad[2]) ``` <img src="images/resized/fpc.resized.png" /></p>
+<pre><code># define board
+#
+
+w = .016
+width = 1.29
+height = 0.93
+mask = .004
+x = 1
+y = 1
+z = -.005
+d = .06
+
+pcb = PCB(x,y,width,height,mask)
+
+IC1 = ATtiny44_SOICN(&#39;IC1\nt44&#39;)
+pcb = IC1.add(pcb,x+.23+0.4,y+.59,z)
+
+J1 = header_ISP(&#39;J1\nISP&#39;)
+pcb = J1.add(pcb,IC1.x+.05,IC1.pad[7].y-.22,z,angle=90)
+
+pcb = wire(pcb,w,IC1.pad[8],J1.pad[1])
+
+pcb = wire(pcb,w,IC1.pad[9],J1.pad[3])
+
+pcb = wire(pcb,w,IC1.pad[7],point(IC1.pad[7].x+.01,J1.y-.02,z),J1.pad[4])
+
+pcb = wire(pcb,w,IC1.pad[4],J1.pad[5])
+
+pcb = wire(pcb,w,IC1.pad[14],point(J1.x-.05,J1.y+.02,z),point(J1.x+.05,J1.pad[2].y-.08,z),J1.pad[6])
+
+J2 = header_FTDI(&#39;J2 FTDI&#39;)
+pcb = J2.add(pcb,x+width-.22,IC1.y-.0,z,angle=0)
+
+pcb = wire(pcb,w,J1.pad[2],point(J2.x+.08,J2.pad[3].y,z),J2.pad[3])
+
+pcb = wire(pcb,w,IC1.pad[13],point(IC1.pad[13].x+.24,J2.pad[4].y,z),J2.pad[4])
+
+pcb = wire(pcb,w,IC1.pad[12],point(IC1.pad[12].x+.2,J2.pad[5].y,z),J2.pad[5])
+
+R1 = R_1206(&#39;R1\n10k&#39;);
+pcb = R1.add(pcb,IC1.pad[1].x,IC1.pad[1].y+.1,z)
+
+pcb = wire(pcb,w,R1.pad[1],IC1.pad[1])
+
+pcb = wire(pcb,w,J2.pad[3],point(J2.pad[3].x+.08,R1.y+.06,z),R1.pad[1])
+
+pcb = wire(pcb,w,R1.pad[2],J1.pad[5])
+
+C1 = C_1206(&#39;C1\n1uF&#39;);
+pcb = C1.add(pcb,IC1.pad[14].x,R1.y,z)
+
+pcb = wire(pcb,w,IC1.pad[14],C1.pad[2])
+
+pcb = wire(pcb,w,C1.pad[1],point(C1.pad[1].x,C1.y+.06,z))
+
+pcb = wire(pcb,w,J2.pad[1],C1.pad[2])
+
+REG = regulator_SOT223(&#39;REG&#39;);
+pcb = REG.add(pcb,IC1.x-0.28,1.46,z)
+
+C2 = C_1206(&#39;C2\n10uF&#39;);
+pcb = C2.add(pcb,REG.x-0.09,REG.y-0.28,z,90)
+
+C3 = C_1206(&#39;C3\n10uF&#39;);
+pcb = C3.add(pcb,REG.x+0.09,REG.y-0.28,z,90)
+
+solar = D_1206(&#39;D&#39;);
+pcb = solar.add(pcb,REG.x-0.25,REG.y-0.22,z)
+
+solar2 = C_1206(&#39;+&#39;);
+pcb = solar2.add(pcb,REG.x-0.25,REG.y-0.1,z)
+
+pcb = wire(pcb,0.068,solar2.pad[1],solar2.pad[2])
+
+pcb = wire(pcb,w,solar2.pad[1],solar.pad[1])
+
+solar1 = C_1206(&#39;-&#39;);
+pcb = solar1.add(pcb,REG.x-0.25,REG.y-0.345,z)
+
+pcb = wire(pcb,0.068,solar1.pad[1],solar1.pad[2])
+
+pcb = wire(pcb,w,solar1.pad[1],C2.pad[1])
+
+pcb = wire(pcb,w,solar.pad[2],C2.pad[2])
+
+pcb = wire(pcb,w,C2.pad[2],REG.pad[1])
+
+pcb = wire(pcb,w,J1.pad[6],C3.pad[1])
+
+pcb = wire(pcb,w,J1.pad[6],C2.pad[1])
+
+pcb = wire(pcb,w,J1.pad[6],REG.pad[2])
+
+pcb = wire(pcb,w,REG.pad[3],C3.pad[2])
+
+S = C_1206(&#39;I/N-S&#39;);
+pcb = S.add(pcb,REG.x+0.,REG.y+0.29,z,90)
+
+pcb = wire(pcb,0.068,S.pad[1],S.pad[2])
+
+pcb = wire(pcb,w,IC1.pad[2],S.pad[1])
+
+G = C_1206(&#39;GND&#39;);
+pcb = G.add(pcb,REG.x-.15,REG.y+0.29,z,90)
+
+pcb = wire(pcb,0.068,G.pad[1],G.pad[2])
+
+pcb = wire(pcb,w,REG.pad[4],G.pad[1])
+
+Vcc = C_1206(&#39;Vcc&#39;);
+pcb = Vcc.add(pcb,REG.x-0.3,REG.y+0.29,z,90)
+
+pcb = wire(pcb,0.068,Vcc.pad[1],Vcc.pad[2])
+
+pcb = wire(pcb,w,Vcc.pad[1],point(Vcc.pad[2].x+.0,REG.y,z),REG.pad[3])
+
+R2 = R_1206(&#39;R2&#39;);
+pcb = R2.add(pcb,IC1.x+0.24,IC1.y-0.119,z,90)
+
+pcb = wire (pcb,w,IC1.pad[10],R2.pad[2])
+
+pcb = wire(pcb,w,R1.pad[1],point(R1.pad[1].x,Vcc.y+0.15,z),Vcc.pad[2])
+
+O = R_1206(&#39;O&#39;);
+pcb = O.add(pcb,IC1.x+0.24,IC1.y-0.33,z,90)
+
+pcb = wire(pcb,0.068,O.pad[1],O.pad[2])
+
+pcb = wire(pcb,w,R2.pad[1],O.pad[2]</code></pre>
+<div class="figure">
+<img src="images/resized/fpc.resized.png" />
+
+</div>
 <p>After the board design has finished, I started milling the FR1-paper by the SRM-20 milling cutter.</p>
 <h3 id="soldering">Soldering</h3>
 <p>Now it's time to start soldering the components. But firstly I have to collect the components for soldering.</p>
diff --git a/participants/ahmad.omar/final-project.md b/participants/ahmad.omar/final-project.md
index 21bf8e90f5297d4bb595bd6938878e987ce465bc..57c80f87c5f41b23da5e92434884b367ff508d50 100644
--- a/participants/ahmad.omar/final-project.md
+++ b/participants/ahmad.omar/final-project.md
@@ -21,7 +21,7 @@ First of all Mr. Fransisco asked us to make a prototype of the project by using
 
   In order to design the circuit board I have copied the code text where all the components are defined from this [link](https://pub.pages.cba.mit.edu/libraries/kokompe/pcb.cad). Then I started writing my own code text for designing in **define board** section. The text for my circuit design was as follow:
 
-  ```
+```
 # define board
 #
 
@@ -42,77 +42,42 @@ pcb = IC1.add(pcb,x+.23+0.4,y+.59,z)
 J1 = header_ISP('J1\nISP')
 pcb = J1.add(pcb,IC1.x+.05,IC1.pad[7].y-.22,z,angle=90)
 
-pcb = wire(pcb,w,
-   IC1.pad[8],
-   J1.pad[1])
+pcb = wire(pcb,w,IC1.pad[8],J1.pad[1])
 
-pcb = wire(pcb,w,
-   IC1.pad[9],
-   J1.pad[3])
+pcb = wire(pcb,w,IC1.pad[9],J1.pad[3])
 
-pcb = wire(pcb,w,
-   IC1.pad[7],
-   point(IC1.pad[7].x+.01,J1.y-.02,z),
-   J1.pad[4])
+pcb = wire(pcb,w,IC1.pad[7],point(IC1.pad[7].x+.01,J1.y-.02,z),J1.pad[4])
 
-pcb = wire(pcb,w,
-   IC1.pad[4],
-   J1.pad[5])
+pcb = wire(pcb,w,IC1.pad[4],J1.pad[5])
 
-pcb = wire(pcb,w,
-   IC1.pad[14],
-   point(J1.x-.05,J1.y+.02,z),
-   point(J1.x+.05,J1.pad[2].y-.08,z),
-   J1.pad[6])
+pcb = wire(pcb,w,IC1.pad[14],point(J1.x-.05,J1.y+.02,z),point(J1.x+.05,J1.pad[2].y-.08,z),J1.pad[6])
 
 J2 = header_FTDI('J2 FTDI')
 pcb = J2.add(pcb,x+width-.22,IC1.y-.0,z,angle=0)
 
-pcb = wire(pcb,w,
-   J1.pad[2],
-   point(J2.x+.08,J2.pad[3].y,z),
-   J2.pad[3])
+pcb = wire(pcb,w,J1.pad[2],point(J2.x+.08,J2.pad[3].y,z),J2.pad[3])
 
-pcb = wire(pcb,w,
-   IC1.pad[13],
-   point(IC1.pad[13].x+.24,J2.pad[4].y,z),
-   J2.pad[4])
+pcb = wire(pcb,w,IC1.pad[13],point(IC1.pad[13].x+.24,J2.pad[4].y,z),J2.pad[4])
 
-pcb = wire(pcb,w,
-   IC1.pad[12],
-   point(IC1.pad[12].x+.2,J2.pad[5].y,z),
-   J2.pad[5])
+pcb = wire(pcb,w,IC1.pad[12],point(IC1.pad[12].x+.2,J2.pad[5].y,z),J2.pad[5])
 
 R1 = R_1206('R1\n10k');
 pcb = R1.add(pcb,IC1.pad[1].x,IC1.pad[1].y+.1,z)
 
-pcb = wire(pcb,w,
-   R1.pad[1],
-   IC1.pad[1])
+pcb = wire(pcb,w,R1.pad[1],IC1.pad[1])
 
-pcb = wire(pcb,w,
-   J2.pad[3],
-   point(J2.pad[3].x+.08,R1.y+.06,z),
-   R1.pad[1])
+pcb = wire(pcb,w,J2.pad[3],point(J2.pad[3].x+.08,R1.y+.06,z),R1.pad[1])
 
-pcb = wire(pcb,w,
-   R1.pad[2],
-   J1.pad[5])
+pcb = wire(pcb,w,R1.pad[2],J1.pad[5])
 
 C1 = C_1206('C1\n1uF');
 pcb = C1.add(pcb,IC1.pad[14].x,R1.y,z)
 
-pcb = wire(pcb,w,
-   IC1.pad[14],
-   C1.pad[2])
+pcb = wire(pcb,w,IC1.pad[14],C1.pad[2])
 
-pcb = wire(pcb,w,
-   C1.pad[1],
-   point(C1.pad[1].x,C1.y+.06,z))
+pcb = wire(pcb,w,C1.pad[1],point(C1.pad[1].x,C1.y+.06,z))
 
-pcb = wire(pcb,w,
-   J2.pad[1],
-   C1.pad[2])
+pcb = wire(pcb,w,J2.pad[1],C1.pad[2])
 
 REG = regulator_SOT223('REG');
 pcb = REG.add(pcb,IC1.x-0.28,1.46,z)
@@ -129,104 +94,65 @@ pcb = solar.add(pcb,REG.x-0.25,REG.y-0.22,z)
 solar2 = C_1206('+');
 pcb = solar2.add(pcb,REG.x-0.25,REG.y-0.1,z)
 
-pcb = wire(pcb,0.068,
-   solar2.pad[1],
-   solar2.pad[2])
+pcb = wire(pcb,0.068,solar2.pad[1],solar2.pad[2])
 
-pcb = wire(pcb,w,
-   solar2.pad[1],
-   solar.pad[1])
+pcb = wire(pcb,w,solar2.pad[1],solar.pad[1])
 
 solar1 = C_1206('-');
 pcb = solar1.add(pcb,REG.x-0.25,REG.y-0.345,z)
 
-pcb = wire(pcb,0.068,
-   solar1.pad[1],
-   solar1.pad[2])
+pcb = wire(pcb,0.068,solar1.pad[1],solar1.pad[2])
 
-pcb = wire(pcb,w,
-   solar1.pad[1],
-   C2.pad[1])
+pcb = wire(pcb,w,solar1.pad[1],C2.pad[1])
 
-pcb = wire(pcb,w,
-   solar.pad[2],
-   C2.pad[2])
+pcb = wire(pcb,w,solar.pad[2],C2.pad[2])
 
-pcb = wire(pcb,w,
-   C2.pad[2],
-   REG.pad[1])
+pcb = wire(pcb,w,C2.pad[2],REG.pad[1])
 
-pcb = wire(pcb,w,
-   J1.pad[6],
-   C3.pad[1])
+pcb = wire(pcb,w,J1.pad[6],C3.pad[1])
 
-pcb = wire(pcb,w,
-   J1.pad[6],
-   C2.pad[1])
+pcb = wire(pcb,w,J1.pad[6],C2.pad[1])
 
-pcb = wire(pcb,w,
-   J1.pad[6],
-   REG.pad[2])
+pcb = wire(pcb,w,J1.pad[6],REG.pad[2])
 
-pcb = wire(pcb,w,
-   REG.pad[3],
-   C3.pad[2])
+pcb = wire(pcb,w,REG.pad[3],C3.pad[2])
 
 S = C_1206('I/N-S');
 pcb = S.add(pcb,REG.x+0.,REG.y+0.29,z,90)
 
-pcb = wire(pcb,0.068,
-   S.pad[1],
-   S.pad[2])
+pcb = wire(pcb,0.068,S.pad[1],S.pad[2])
 
-pcb = wire(pcb,w,
-   IC1.pad[2],
-   S.pad[1])
+pcb = wire(pcb,w,IC1.pad[2],S.pad[1])
 
 G = C_1206('GND');
 pcb = G.add(pcb,REG.x-.15,REG.y+0.29,z,90)
 
-pcb = wire(pcb,0.068,
-   G.pad[1],
-   G.pad[2])
+pcb = wire(pcb,0.068,G.pad[1],G.pad[2])
 
-pcb = wire(pcb,w,
-REG.pad[4],
-   G.pad[1])
+pcb = wire(pcb,w,REG.pad[4],G.pad[1])
 
 Vcc = C_1206('Vcc');
 pcb = Vcc.add(pcb,REG.x-0.3,REG.y+0.29,z,90)
 
-pcb = wire(pcb,0.068,
-   Vcc.pad[1],
-   Vcc.pad[2])
+pcb = wire(pcb,0.068,Vcc.pad[1],Vcc.pad[2])
 
-pcb = wire(pcb,w,
-   Vcc.pad[1],point(Vcc.pad[2].x+.0,REG.y,z),
-   REG.pad[3])
+pcb = wire(pcb,w,Vcc.pad[1],point(Vcc.pad[2].x+.0,REG.y,z),REG.pad[3])
 
 R2 = R_1206('R2');
 pcb = R2.add(pcb,IC1.x+0.24,IC1.y-0.119,z,90)
 
-pcb = wire (pcb,w,
-     IC1.pad[10],
-     R2.pad[2])
+pcb = wire (pcb,w,IC1.pad[10],R2.pad[2])
 
-pcb = wire(pcb,w,
-   R1.pad[1],point(R1.pad[1].x,Vcc.y+0.15,z),
-   Vcc.pad[2])
+pcb = wire(pcb,w,R1.pad[1],point(R1.pad[1].x,Vcc.y+0.15,z),Vcc.pad[2])
 
 O = R_1206('O');
 pcb = O.add(pcb,IC1.x+0.24,IC1.y-0.33,z,90)
 
-pcb = wire(pcb,0.068,
-   O.pad[1],
-   O.pad[2])
+pcb = wire(pcb,0.068,O.pad[1],O.pad[2])
+
+pcb = wire(pcb,w,R2.pad[1],O.pad[2]
+```
 
-pcb = wire(pcb,w,
-   R2.pad[1],
-   O.pad[2])
-   ```
 ![](images/resized/fpc.resized.png)
 
 After the board design has finished, I started milling the FR1-paper by the SRM-20 milling cutter.
diff --git a/participants/ahmad.omar/omar.css b/participants/ahmad.omar/omar.css
index cf81b70dbdd0a90e7979fe54c4655f215d9e5161..4c534bbf2690e1432ba5bc9c7fa041718449f2d1 100644
--- a/participants/ahmad.omar/omar.css
+++ b/participants/ahmad.omar/omar.css
@@ -95,6 +95,7 @@ h4,
   margin: 1.414rem 0 .5rem;
   font-weight: inherit;
   line-height: 1.42;
+  font-family: 'LibreBaskerville', Italic, serif;
 }
 
 h1,
@@ -149,12 +150,12 @@ textarea {
 
 body {
   color: #444;
-  font-family: 'Open Sans', Helvetica, sans-serif;
+  font-family: 'Open Sans', regular, sans-serif;
   font-weight: 300;
-  margin: 6rem auto 1rem;
+  margin: 0 auto;
   max-width: 48rem;
-  text-align: center;
-}
+  line-height: 1.45;
+  padding: .25rem;
 
 
 img,